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Wafer-level packaging : ウィキペディア英語版
Wafer-level packaging
__NOTOC__
Wafer-level packaging (WLP) is the technology of packaging an integrated circuit while still part of the wafer, in contrast to the more conventional method of slicing the wafer into individual circuits (dice) and then packaging them. WLP is essentially a true chip-scale package (CSP) technology, since the resulting package is practically of the same size as the die.〔("Tessera Working WLP, Wafer-Level Optics", ''Semiconductor International'', April 1 2009 ).〕 Wafer-level packaging allows integration of wafer fab, packaging, test, and burn-in at wafer level in order to streamline the manufacturing process undergone by a device from silicon start to customer shipment.
Wafer-level packaging consists of extending the wafer fab processes to include device interconnection and device protection processes. Most other kinds of packaging do wafer dicing first, and then put the individual die in a plastic package and attach the solder bumps. Wafer-level packaging involves attaching the top and bottom outer layers of packaging, and the solder bumps, to integrated circuits while still in the wafer, and then wafer dicing.
There is no single industry-standard method of wafer-level packaging at present.
A major application area of WLPs are smartphones due to the size constraints. For example, the Apple iPhone 5 has at least eleven different WLPs, the Samsung Galaxy S3 has six WLPs and the HTC One X has seven. Functions provided WLPs in smartphones include: compass, sensors, power management, wireless etc.〔John Hunt, (Value Engineered Wafer Level Packages for Mobile Devices ), p. 7〕
In early 2015, it was discovered that a WL-CSP (wafer level chip scale packaging) chip on the Raspberry Pi 2 had issues with xenon flashes (or any other bright long wave flashes of light) inducing photoelectric effect within the integrated circuit. Thus careful consideration of exposure to extremely bright light will need to be considered with wafer level packaging. ()
==See also==

* List of integrated circuit packaging types
* Chip scale package
* Wafer-scale integration
* Wafer bonding

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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